THE MOST TYPICAL Mistakes Engineers Makes in PCB Design
2018-11-26 11:34Writer: qyadminReading:
Engineering mistakes can't ever be avoided. You shouldn't be silly to think that those mistakes are a symbol of low level or void of excellence in PCB style capability. However, the majority of mistakes engineers makes are based on their excessive considerations in conditions of system efficiency, transmission integrity, low energy usage and price saving. Put another method, those mistakes derive from "kindness". Therefore, consciousness about the "kindness" and timely avoidance of these mistakes is greatly good for the easy implementation of work.
Mistake 1: Random modify of CPU
Some engineers discover that CPU with a simple frequency of 100M has processing capacity of simply 70% plus they would like to change it out with a 200M. Actually, the processing capability of system involves all types of elements and in neuro-scientific communication, difficulty usually occurs on memory space, which means that regardless of high velocity of CPU, it's still a waste of attempts with external check out with a minimal speed.
Mistake 2: Larger cache leads to raised speed of system.
The improvement of cache doesn't invariably lead to powerful of system and sometimes shutdown of cache prospects to raised speed of system than application of it because data that's moved into cache must obtain multiple applications unless system efficiency will be increased. Therefore, generally just command cache is opened up while data cache is limited in partial space for storage even if it's opened.
Mistake 3: Believing interruption is faster than query.
Interruption offers strong instantaneity nonetheless it isn't just fast. If there are way too many interruption missions, program will soon breakdown consequently of discontinuity of interruption missions. If there are numerous frequent jobs, many CPU initiatives will be allocated to cost of interruptions to ensure that system effectiveness will be extremely sluggish. If query is used instead, system performance will improve greatly. Nevertheless, sometimes, query does not meet the dependence on instantaneity, so the most practical method is to use query along the way of interruption.
Mistake 4: Period sequence at storage interfaces doesn't require modifying.
Default value at memory space interfaces is all dependant on the most conservative parameters and in the request, it must be reasonably modified relative to bus operating frequency and waiting around period. Sometimes, loss of frequency can improve effectiveness.
Mistake 5: More CPUs can help increasing processing capacity.
It is said that two heads are much better than 1. For CPUs, it is not usually true. The amount of CPUs can not be determined until complete knowledge of the system occurs since coordination between CPUs might cost a lot.
Mistake 1: Over-believing in simulation data.
Simulation can't ever be exactly like practical object and variations might occur among the same items actually in the same batch. Moreover, simulation does not take all possibilities under consideration, especially crosstalk. Consequently, simulation result could be only seen as a reference.
Mistake 2: Digital transmission edge ought to be as steep as feasible.
The steeper the edge is, the wider the spectral range will be and the more energy in high-frequency part will be. At the same time, the more radiation high-frequency indicators will produce and they'll easily hinder other signals with poor tranny quality on leads. As a result, low-speed chips ought to be applied as much as possible.
Mistake 3: Decoupling capacitor ought to be as much as possible.
In most cases, the more decoupling capacitors presently there are, the more stable power will be. Nevertheless, way too many capacitors will also result in some disadvantages like a waste of price, hard routing and too big powering impulse current. The main element to decoupling capacitance style is based on correct selection and positioning.
Mistake 1: Neglecting energy consumption issue regarding 220V supply
The objective of low energy consumption style doesn't only lie in energy saving, but also on loss of cost of power module and warmth dissipation system. It's certainly insufficient to consider power when coping with energy consumption problems since energy intake is mostly dependant on quantity of current and temperature of parts.
Mistake 2: All bus signals ought to be pulled by resistors.
Sometimes, signals have to be pulled by resistors however, not all. The existing consumed when a real is usually pulled up or down is merely tens of microamps as the current consumed for pulling up or down of a powered signal reaches the amount of milliamp. If all indicators are pulled by resistors, more energy needs to be consumed on resistors.
Mistake 3: Departing unused I/O interfaces unused
Unused We/O interfaces upon CPU and FPGA will possibly become input indicators with repeating oscillations if they suffer from a good little interference from exterior environment. Moreover, energy usage of MOS elements basically depends upon reversal occasions of gate circuit. For that reason, the very best solution to it really is to create those interfaces as result that mustn't be linked with signals with motorists.
Mistake 4: Without considering energy consumption of little chip.
It's difficult to determine energy intake of not at all hard chips inside program since energy usage is generally dependant on current on pins. For instance, power intake of ABT16244 is significantly less than 1mA without load. Nevertheless, each pin of it really is capable of driving lots of 60mA, which implies that the utmost energy consumption with complete loads can reach 960mA. An enormous difference of energy usage takes place.
Mistake 5: Overshoot could be eliminated through excellent matching.
Overshoot exists on virtually all indicators except some special indicators such as for example 100BASE-T or CML. Matching isn't necessary so long as it is not so large. Incredibly high requirements are aroused by coordinating. For example, result impedance of TTL is definitely significantly less than 50Ω, some also 20Ω and if this kind of a big matching is implemented onto it, current can be so huge that energy consumption does not accept it. Plus, transmission amplitude will be therefore small that it can not be used once again. BTW, result impedance isn't the same when regular signals output higher level and low level and ideal matching can't ever be obtained aswell. Therefore, matching between indicators such as for example TTL, LVDS and 422 could be suitable for overshoot, which may be the best solution.
Mistake 6: Energy intake issues are related to hardware only.
In something, hardware is accountable for establishing a stage while software performs a substantial role in the perform. Each chip go to and reversals of every signal are nearly managed by software program. Implementation of suitable steps will contribute too much to loss of energy consumption.
Mistake 1: Neglecting level of resistance accuracy of pull-up/pull-down resistors
Some engineers don't believe level of resistance accuracy of pull-up/pull-down resistors issues. For example, they have a tendency to pick randomly, 5K, because it is simple to calculate. As a matter of known fact, however, level of resistance of 5K doesn't exist in component marketplace and the closest can be 4.99K (accuracy is 1%) and 5.1K (precision is 5%) whose costs are respectively four instances and twice bigger than that of 4.7K (accuracy is 20%). However, resistors with level of resistance whose accuracy is certainly 20% come just in the kind of 1K, 1.5K, 2.2K, 3.3K, 4.7K and 6.8K. With 4.99K or 5.1K with accuracy of 1% weighed against 4.7K with precision of 20%, the previous is obviously cost-effective.
Mistake 2: Random collection of indicating light color
Some engineers grab indicating light color predicated on their favor. Nevertheless, technologies on indicating lamps whose colors are reddish, green, yellow-colored or orange have already been developed for lovers of years. Furthermore, their price is incredibly low. In contrary, blue indicating lights receive fairly poor technology maturity and low supply reliability with cost four to five moments higher. Until now, blue indicating lighting are simply applied in circumstances where other colors can't ever be changed such as for example video signal indicating.
Mistake 3: Software of CPLD simply for top grade
Some engineers apply CPLD rather than gate circuit of 74** for top level grade. However, it'll lead to more expensive and numerous function for production and documents.
Mistake 4: Striving for the quickest MEM, CPU and FPGA
Met with high system necessity, engineers consider all the chips need to be the quickest such as for example MEM, CPU and FPGA. As a matter of fact, in a high-rate system, not absolutely all parts will work at a higher speed. Moreover, element working acceleration improvement leads to raising of price and great interferece to transmission integrity.
Mistake 5: Just counting on automatic routing
For PCB style with low design necessity, some engineers simply depend on automated routing. Automatic routing have a tendency to cause bigger PCB region and through-hole vias that are multiple situations a lot more than appliecaiton of manual routing. Since collection width and quantity of through-hole vias straight impact yield of PCB and driller usage, cost is then significantly influenced. To get cost in order, it's easier to make the very best of manual routing.Sand casting is an extremely common commercial technique in the united states. "It's been carried out in Kuwait for such a long time that it's now section of the heritage," the developer explained.
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