How difficult to implement High Density FDR Interconnection

2019-12-16 16:40Writer: qyadminReading:

      Layout and Stack Design

       For PCB design, circuit table framework and stack need to taken into account first. Usually, the design and form of circuit panel has decided. and the dedication of stack quantity lies. in transmission frequency, circuit plank pin density. PCB fabrication cost, production period and reliability requirements. FDR interconnection change planks have high frequency and density. and software of multi-layer planks is the required step to lessen interference. Furthermore, the perseverance of stack amount is crucial.

      You will find 24 ports on FDR interconnection chip and each port features 8 Tx channels. and 8 Rx channels in the procedure approach to intercoupling. 6 interconnection chips and 3 downlink chips applied by FDR interconnection table. and 32 slots accessed through backboard connector. 3 uplink chips gain access to 21 slots . through QSFP (Quad Small Form-factor Pluggable) optical fibers. Uplink chip and downlink chip linked between one another through 4 slots. which shown in Determine 1. 
High Density FDR Interconnection Switch Boards

       FDR features the bundle of BGA (Ball Grid Array) with a location of 50mmx50mm, 1157 pins and spacing of one 1.0mm. and P/N pins at the slots of Tx and Rx distributed according to 3 concentric circles. 3 transmission layers can employed to business lead all the pins whatsoever slots out of BGA. With the next two elements considered, two transmission layers. may used to gain access to several pins of concentric circles.

a. Due to the restriction of spacing. the collection width/spacing/width of differential lines is 4mil/4mil/4mil. and it'll extended into 8mil/10mil/8mil appearing out of BGA and the length. between differential range pairs should be a smallest of 50mil. Thus, a set of differential lines must take up a width of 2mm and 48 pairs of indicators are. along the advantage with the largest density. So it is difficult to apply this method.
b. Spacing between BGA pins is 1mm. If a sign layer put on access several concentric circle indicators. the spacing between differential series pairs under BGA is 14mil. that is not the mandatory 50mil. Furthermore, the maximum parallel routing size is 20mm, that may generate some crosstalk.
      to avoid the negative factors mentioned before. two transmission layers put on access several concentric circle indicators. and differential transmission at each transmission layer needs to led away of BGA. according to 50mil spacing. Thus, at least 6 layers required by FDR interconnection planks to. make all the differential indicators led out of BGA. Using the connectivity. and routing amount of panel and enough plank surface. for exchange coupling capacitor considered. 8 inner indicators and 22 coating stack applied.

    Crosstalk Evaluation and Decrease Measures

      Crosstalk is the first concern in conditions of high-speed and high-density circuit design. When voltage and current in the offensive collection change. electromagnetic coupling will need place through shared capacitance and shared inductance. between offensive range and victim series. The crosstalk flowing toward tranny terminal along victim collection named near-terminal crosstalk. as the crosstalk flowing toward getting terminal along victim range named far-terminal crosstalk. In most cases, the sound voltage on the victim series should managed. less than 5% of transmission voltage. You need to control the crosstalk. budget of single-edge offensive collection within 1% with other sound source. and offensive range around two edges of victim series considered.
      The main element points to check out in conditions of crosstalk reduction include:
a. The spacing between offensive collection and victim range. should be bigger and parallel routing duration should reduced.
b. Integrated floor put on be the coming back path of indicators. In accordance to empirical legislation, for the remove type of 50Ω, when the spacing is 3 x of series width. near-end crosstalk is around 0.5%. For microstrip type of 50Ω, when the spacing is 3 x of collection width, near-end crosstalk is around 1%. The far-end crosstalk on remove lines. or completely inlayed microstrip lines is almost zero. and the far-end crosstalk polarity of microstrip transmitting lines is negative. using its size big because the impact of inductive coupling is. bigger than capacitive coupling.

  • Interval routing

      With this design, the differential impedance of high-speed differential line is 100Ω. Predicated on Si9000 field solver, the range width/spacing/series width. calculated to be 8mil/10mil/8mil. The wider the collection is, small the attenuation is. and the spacing of 10mil is to keep up the differential impedance of 100Ω. This sort of differential range applied outside BGA chip area. To be able to reduce crosstalk, the spacing between two pairs of differential lines is a minimum of 80mil.

      The spacing between pins of interconnection chip in this specific article is 1mm. and the through opening size restriction of BGA. makes the series width/spacing/collection width of the differential. range in the BGA chip area 4mil/4mil/4mil. Even though differential impedance of the kind of differential series is 100Ω as well. the business lead reduction is big. needing differential type of 4mil/4mil/4mil to transformed into 8mil/10mil/8mil. when it enters BGA chip area. To be able to reduce crosstalk. differential type of 4mil/4mil/4mil in BGA chip area applies how of interval. routing to guarantee the spacing . between two pairs of differential lines more than 50mil as well. which shown in Physique 2. 

High Density FDR Interconnection Switch Boards

       • Differential holes

      specific differential holes are occur. this design for the use of exchange coupling capacitance. on the bond surface layer. Floor holes need to positioned. beside differential openings to provide backflow route for returning route. Design of four surface openings features the best impact and two floor holes. can applied when the region of board is bound. Besides, steps such as back again drilling and inner pad eliminationhave. should studied to differential openings to lessen the impedance change. at differential openings to diminish crosstalk and reflection.

 • Preventing Tx and Rx from routed in the same layer

      To be able to reduce crosstalk, Tx differential line. should routed in the various layer from Rx differential line. Here, Tx identifies the foundation terminal of differential collection. while Rx identifies the getting terminal of differential range. If both of these need to routed in the same level, the spacing between them needs to be over 5mm to ensure security.

 • 20H rule

      In the PCB circuit with high frequency and broadband. RF energy coupled by PCB power coating and ground level. and advantage magnetic flux leakage produced between power coating and ground level. The air RF energy can radiated to the free space. 20H guideline shows that if there are high-speed currents on the table. there are electromagnetic areas associated with them. In the look of the article, the length between all the routings. and panel advantage should be at least 20 times of series width. and the length between high-speed differential openings. and power plane cut-off lines reaches least 5mm.

• Routing on the top layer

      In the look of high-frequency PCBs. with the big far-end crosstalk between microstrip lines and strip lines considered. high-speed differential lines prohibited on the top layer. In the look of the article, for the most part 8 inner routing layers required. due to the restriction of manufacturing create. Furthermore, the terminal set up restriction of interconnection chip. helps it be impossible for inner layers. and then put in place the contacts of the interconnection differential lines. between 6 chips inside connection plank. 

PCB FDR Interconnection method


Soldering of PCB Leads:

      This method does not need any connector clip. as long as soldering and the external interconnection points. on PCB with the PCB components or other components outside. such as the speaker in the radio, battery box and so on.
      The points needing attention when soldering interconnections on PCB are as follows:
1)     Soldering pads for leads must placed as far as possible. on the edge of PCBs and arranged in the same size to help soldering and maintenance.
2)     To improve the mechanical strength of the wire connection. it’s necessary to avoid damage to the solder pads or printed leads caused by the leads pulled. Besides, the holes should drilled near the solder joints on the PCBs to allow the leads. to pass through the holes on the solder side of the PCBs. and then insert the holes of solder pads from the component side for soldering.
3)     Arrange or tie the leads. and fix them with PCB through line-card or other fasteners. to prevent the leads from breaking due to movement.

 Soldering of PCB Flexible Flat Cable:

      The two PCBs connected by flexible flat cables. which is reliable and not prone to connection errors. and the relative position between the two PCBs is not limited. Direct soldering between PCBs, which is often used to connect two PCBs at an angle of 90 degrees. After connecting, it becomes an integral PCB part.

PCB Socket Interconnection

     In more complex instruments and equipment. the interconnection methods of connector clip is often used. This "building block" structure not only ensures the quality of mass production. but also reduces the cost of the system and facilitates debugging and maintenance. When device fails, maintenance personnel do not have to check to the component level. (that is, to check the cause of the failure, until check to the specific component. This work will take quite a long time.). as long as maintenance personnel judge. which PCB is abnormal, they can immediately replace that PCB.

    which cannot only drop faults in the shortest time, but shorten the downtime. Thus, it can improve the use rate of the device. Besides, the replaced PCB can repaired in plenty of time and used as spare parts after repair.
      This interconnection is often used in more complex instruments and devices. This method makes the printed plug from the PCB edge. and the plug part designed according to the size of the socket. the interconnection points. the contact distance, the location of the positioning holes and so on. so about make it match with the special PCB socket.
         When manufacturing PCB. the plug part needs to be gold-plated to improve wear resistance. and reduce contact resistance. which has the simple assembly, great interchangeability. good maintenance performance, and is suitable for standardized mass production. The disadvantage of this method is that the cost of PCB increased. and the requirements of PCB manufacturing precision and process are higher. Besides, its reliability is poor.

       For example, it often lead to poor contact because the plug part oxidized or socket spring aging. to improve the reliability of external interconnection. the same outgoing line is often drawn out in parallel. through the contacts on the same side or both sides of PCB.

Standard Pin Interconnection:

This method can used for PCB external interconnection. especially in small instruments used pin connection. Two PCBs connected by a standard pin, and they are generally parallel. or vertical as it is benefit for the mass production.


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