At the moment, the fast development of Internet technology witnesses the substantial software of email, online payment and personal communication. Under this history, information security is a critical research theme round the world. PKI (General public Key Infrastructure) technology provides security service by using general public key theory and technology. PCIE (Peripheral Component User interface Communicate) technology has received wide applications in high-speed devices as the 3rd era I/O bus standard applying serial data tranny and point-to-point interconnection technology. In neuro-scientific digital system design, relatively high clock frequency leads for some problems in perspectives of transmission integrity, power integrity and crosstalk and traditional PCB design does not meet the dependence on system stability.
This short article offers a PCB design plan on high-speed security password card predicated on PCIE based on the advantages of PCIE high-speed serial transmitting.
Overall Design Scheme
FPGA chip EP4CGX50CF23C6N owned by Cyclone IV GX created by Altera is applied in this design, integrating PCIE IP hardcore module and applying 4 high-speed data tranny password cards design. Four types of chips, chip 1, chip 2, chip 3 and chip 4, can handle respectively applying algorithms of SM1, SM2/SM3, SM4 and SSF33 and applying functionalities of security password card initialization, key administration, back-up and recovery and expert management. Security password cards are applied in PCs, linked with main table in PCs through PCIE slot machine and managed by PCs. IP hardcore in FPGA is put on implement PCIE, resulting in the communication between PCIE primary and SRAM cache and control component. As the control middle, NiosII implements the function of security password card software. At the same time, additional security password chip implements the communication between each user interface module and security password credit card. The hardware framework design of security password cards is illustrated in Determine 1 below.